Mr. M. Mohsin Rahmatullah

Mr. Rahmatullah is Senior Member Technical and Director Business Development at CARE. He specializes in Digital ASIC, Mr. Rahmatullah is a senior and permanent faculty member at SS-CARE. He specializes in Digital ASICs, Multi-processor SoC and FPGA based Design and Communication System Design. He has more than ten years of teaching and work experience in Telecommunications, R&D and Process Improvement, and holds five patents in the field of communication and architecture designs. He has authored or co-authored numerous publications in different journals and conferences.

Educational Qualifications

M.S. Electrical Engineering, 1995, Georgia Institute of Technology Atlanta, GA USA
B.S. in Electrical Engineering, 1994, University of Illinois Urbana-Champaign, IL USA

Work Experience

Mr. Rahmatullah has multiple years of teaching experience at various levels as visiting faculty that includes undergraduate and MS level courses at college of E&ME, National University of Sciences and Technology (NUST), Rawalpindi; Iqra University, Islamabad and Center for Advanced Studies in Engineering (CASE), Islamabad. Mr. Rahmatullah was the Director VLSI Design at Avaz Networks where he delivered multimillion gates SoC for VoIP applications containing 40 on chip DSPs, RISC processor and peripheral interfaces such as PCI, SDRAM, TDMIO, POS-II and Utopia-II interfaces. The ASIC was capable of supporting up to 2000 simultaneous VoIP channels and designed for carrier class applications. Prior to this, he and his team have also delivered 850k gates SoC designed for 256 VoIP channels. Mr. Rahmatullah has also done consultancy work for NEC Electronics, Nortel Networks and Silicon Data and designed PCI host bridges and RISC interfaces for multiple system controller ASIC and a programmable security processor for IPSecurity application capable of supporting upto 512 Mbps data rate. Mr. Rahmatullah has also worked at AMD in their multimedia and communication groups as a design engineer where he had developed V.34 modem components and algorithms for GSM based WLL solution.

Research Interests

Digital ASIC Design and Communication System Design